1. Field of the Intention
The present invention relates to a structure for a three-dimensional package where a plurality of chips are overlaid, that enables both power supply and heat dissipation.
2. Description of Related Art
A three-dimensional multilayer package has a plurality of chips overlaid. Currently, there are problems with how to provide power to these chips and how to cool or dissipate heat generated from these chips.
When most of the power for an electric circuit is supplied based on unit volume there is a basic relationship that most of the heat will be generated per unit volume and progress towards higher density and higher integration.
Japanese Patent Application 2003-318361 discloses technology for a three-dimensional multilayer structure where heat passes through an interposer with a wiring layer and is dissipated to the surroundings by a heat spreader.
Japanese Patent Application 2006-93659 discloses technology that provides power by a silicon interposer with the wiring layer.
Japanese Patent Application 2010-73851 provides a plurality of heat dissipating layers formed in layers and as many heat conductive (thermal) vias as possible without causing an increase in the size of the heat dissipating member, as an attempt to link to a larger heat dissipating member and to enhance heat dissipation.
Further discussion concerning improvisations do not develop a route for supplying power and a route for dissipating heat. Recently, increasing density and increasing integration have reached a level where a structure that achieves both power supply and cooling spatially and three dimensionally must be considered.